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How to properly reset the dpu core after its running?

Question asked by tom malnar on Jul 4, 2019
Latest reply on Jul 8, 2019 by tom malnar

We write our own OS-agnostic drivers for the display path in the i.MX8QM.  

They cover the dpu, hdp and LVDS blocks.  We are currently encountering an issue with the dpu and were wondering if you could provide any information regarding the sequence to correct the issue. 

The issue occurs when we try to reinitialize the dpu core a second time.  Basically killing/restarting our driver after video is currently being shown by the dpu.  On the second initialization the dpu core will not fetch frame buffer buffer data and display it, but all other aspects of the dpu appear to be working.  The timing is correctly shown on the monitor, just black screen.  

We have confirmed when this issue occurs the built in frame generator test pattern in framegen0_FgInCtrl still works. 

The built in framegen constant color via framegen0_FgCCR also works.  

Only the mechanism to fetch real frame buffer data appears to be locked up.

We have tried issuing clock/power disables for the dpu core using scu commands but nothing seems to truly reset the dpu core. 

Can you please provide the sequence required to reset the dpu properly.  

Our drivers support both the first gen and second gen i.MX8QM silicon revisions.