A2T07D160W04SR3 RF Power LDMOS Transistor Biasing?

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A2T07D160W04SR3 RF Power LDMOS Transistor Biasing?

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manjupatil
Contributor I

Hello Team NXP,

We are using A2T07D160W04SR3 RF Power LDMOS Transistor in our application.

We are biasing the PA as per the datasheet ie.VDD = 28 Vdc,IDQA = 450 mA, VGSB = 1.2 Vdc.

where Carrier amplifier is biased for fixed current of 450mA and peak amplifier to fixed voltage of 1.2V,

am i right in biasing the PA or we should be adjusting the carrier and peak amplifier bias to get optimum results?

Please help me out in this.

Note : it is not allowing to post this question in RF amplifier publish location that is the reason why I am posting It here.

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4 Replies

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LPP
NXP Employee
NXP Employee

As a rule, every design is a compromise between various design targets.
Carrier and peaking channel biasing can be tuned to achieve optimum performance of the PA design. Optimal values depend on which parameters a designer considers to be more important.

A2T07D160W04SR3 datasheet provides performance data measured on the NXP reference design. If you want to reproduce this design then the same biasing shall be used. Note, these are not "must be" values. They represent conditions used to measure performance data.


Have a great day,

Pavel
TIC

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manjupatil
Contributor I

Thanks LPP. As per the data sheet (it is symmetrical amplifier) 

Carrier biasing, We fixed at Idq = 450 mA, Which tanslated to Vgsa = 2.1V

Then Peaking biasing, We fixed at Vgsb = 1.2V

With LTE signal (without CFR and DPD),  we have a clean linear output at average power 23 dBm. But above 23 dBm, we could start seeing non linear waveform

When we started increasing peak Vgsb to 1.3v,..1.5V ..like this up to 2.0V, our observation is linearity/gain improved, We could see clean linear waveform up to 33 dBm.

Our questions are ->

   ----- Is it allowed to increase the peaking bias?

 ------- if so up to what voltage? (without damaging amplifier)

-------- How does this affect the improving the linearity/gain?

Do you have any general biasing rules for peaking amplifier. 

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LPP
NXP Employee
NXP Employee

The auxiliary device is assumed to turn ON at a specific input power level (breaking point), typically 6 dB backed-off from the maximum total power of the Doherty amplifier. Though, Class-C peaking amp has large AM-PM component. Phase alignment of the carrier and peaking channels may have great influence on the Doherty amplifier linearity. Thus, the optimal bias level of the peaking channel is a subject to investigate and it would depend on the amplifier design.

You can see example of influence of the peaking channel bias in page 40 of this useful presentation:

Christopher Burns, RFMD, High Power Doherty Design, Modeling & Measurement
https://www.keysight.com/upload/cmc_upload/All/7March2013Webcast.pdf

> Is it allowed to increase the peaking bias?

Yes. But an optimum value exist.

> If so up to what voltage? (without damaging amplifier)

In the extreme case, you can provide the same (class AB) bias for carrier and peaking devices, so that, both will work in parallel. It will work. It will provide the same maximum output power. But it will lose efficiency advantage of Doherty design at mid power.

> How does this affect the improving the linearity/gain?

See the presentation above.

Unfortunately, we can not provide you similar curves for A2T07D160W04SR3 reference design. Please note that datasheet provides gain and efficiency curves for single-carrier W-CDMA signal with PAR 9.9 with 0.01% Probability on CCDF. These are very different from the single tone curves in the presentation.

Have a great day,

Pavel
TIC

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Note:
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- We are following threads for 7 weeks after the last post, later replies are ignored
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manjupatil
Contributor I

Thank you LPP,

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