Hi Jack
for DQS gating issues one can try to change drive strength of mmdc signals,
check for example description of IOMUXC_SW_PAD_CTL_GRP_B1DS register
i.MX6Q Reference Manual. For other errors one can attach jtag and
check memory signals with oscilloscope, perform simple
write/read ddr test using baremetal i.MX6Q SDK found on SMP Enable in IMX6
example in ..src/tests/ddr_test.c
Best regards
igor
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