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MPC5777C eTPU channel interrupt generation

Question asked by Prathap V C on Jun 21, 2019
Latest reply on Jul 11, 2019 by Prathap V C

Hi,

I am not able to generate eTPU channel interrupt for every 40ms when QOM loaded with counts corresponding to 40ms

 

 

Please refer the following settings done in

a) main.c

 

/* initialize pads */
SIU.PCR[ETPUB0_pin].R = (ALT1 | OBE | WPE | WPS | DRV) ;
SIU.PCR[ETPUB1_pin].R = (ALT1 | IBE | WPE | WPS | DRV) ;

 

ETPU.CIER_B.B.CIE0 = 0x1;
ETPU.CHAN[64].CR.R = 0x80000000; //enable interrupt

 

/* enable all timebases */
fs_timer_start ();

*upper_QOM_SCR16 = 0xC0C0; /* clear QOM DMA/interrupt service request */
*upper_FPM_SCR16 = 0xC0C0; /* clear FPM DMA/interrupt service request */

/* initialize eTPU channels */
// init QOM channel Low using QOM function
// init QOM channel Low using QOM function
error_code = fs_etpu_qom_init (QOM0,
FS_ETPU_PRIORITY_MIDDLE,
FS_ETPU_QOM_SINGLE_SHOT ,
FS_ETPU_TCR1,
FS_ETPU_QOM_INIT_PIN_LOW,
FS_ETPU_QOM_IMMEDIATE,
(uint32_t *) 0,
10,
QOMLO_array_size,
my_event_array_QOMA);//my_event_array_QOMLO

/* wait for QOM to finish */
while (ETPU.CHAN[QOM0].SCR.B.CIS == 0) {};

*upper_QOM_SCR16 = 0xC0C0; // clear DMA/interrupt service request

 

 

b) MPC5777C_IsrVecTab.c

 

IntcIsrVectorTable:

ISRline eTPU_B0_ISR ;Vec 243,

 

 

c) Interrupts.c

 

void Interrupts_init(void)
{
/* Initialize INTC for software vector mode */
INTC.MCR.R = 0x00000000;

/* configure IVPR and IVORx offsets, also includes a trap for all core
exceptions, excluding IVOR4 exceptions which have seperate handler */
e200zX_Interrupt_Setup();

/* Set INTC ISR vector table base address */
INTC.IACKR.R = (uint32_t) &IntcIsrVectorTable[0];
INTC.IACKR_PRC1.R = (uint32_t) &IntcIsrVectorTable[0];

/* assing required peripheral priorities */
INTC.PSR[244].R = PRC_SEL_CPU0 | PRC_PRI(1); // eTPU_B_chnl_1
/* assing required peripheral priorities */
INTC.PSR[243].R = PRC_SEL_CPU0 | PRC_PRI(1); // eTPU_B_chnl_0
}

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