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Refresh cycle counter in IPU

Question asked by Kazuma Sasaki on Jun 19, 2019
Latest reply on Jul 3, 2019 by Kazuma Sasaki

From i.MX 6Solo/6DualLite Applications Processor Reference Manual, Rev. 4, 07/2018

 

38.1.2.1.6.1 Screen Refresh
• The refresh rate may vary within a predefined range. Within this range, the rate is
dynamically adjusted to the content update rate.
• An indication about the availability of new content is obtained as follows:

• If the page-flip double buffering is used, the mechanism provides this indication
• If only a single buffer is used (and incrementally updated), the IPU can receive
an indication of a modification from the ARM platform (by setting an internal
flag).
The IPU counts the refresh cycles: the total and those with new content. The ARM
platform can use these counters to optimize display management (e.g. switching
display buffer compression on/off). The counters are reset by the ARM platform.
• The transferred data may be processed on the way, using the IC and DP.

 

IPU is counting display refresh cycles according to above description.

I would like to check this counter for debugging our system.

Could you please teach me register name to get the counted value?

 

Best Regards,

Kazuma Sasaki.

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