MCIMX6D5EYM10ADR(i.MX6D), JTAG not working properly in ICT(u49_u49_dis).

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MCIMX6D5EYM10ADR(i.MX6D), JTAG not working properly in ICT(u49_u49_dis).

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wugavin
Contributor I

I'm the ICT engineer, now have the problem with Device U49: MCIMX6D5EYM10ADR, the JTAG not working properly in ICT(u49_u49_dis).

the bsdl file I downloaded from the website: IMX6D_21x21_BSDL_TO1.2.bsdl.

also check all power pin with U49, all OK.

on the other side, I also put the compliance pin as below to 011

attribute COMPLIANCE_PATTERNS of IMX6D: entity is
"(TEST_MODE, JTAG_MOD, POR_B) (011)";

So, I want to know, is there any more signal /pattern should be add to the device, so that can enter the JTAG model well. thanks! 

Gavin

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Yuri
NXP Employee
NXP Employee

Hello,

   According to Table 2-21 (Recommended connections for unused analog interfaces )

of https://www.nxp.com/webapp/Download?colCode=IMX6DQ6SDLHDG 
PCIE_VP, PCIE_VPH, PCIE_VPTX  (and all the other supply voltages) must remain powered

if boundary scan test (BSDL) needs to be done. Please check it. 

Regards,

Yuri.

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wugavin
Contributor I

Hi Yuri.

Thanks a lot, I checked the schematic drawing, due to PCIE_VP, PCIE_VPH, PCIE_VPTX pull-down to GND, so the device can NOT tested by boundary-scan now. thanks!

Gavin Wu

13862020320@139.com

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