I want to use the PoP version of iMX6 in my new design. But there are no reference schematics for the same. Neither are any supported LPDDR2 memories described. I reference some of the blogs regarding the same in community and found that EDB8164B4PT-1DAT-F is compatible.
When I saw the pin connection between two I made following observation:
As per the ball assignment processor channel 1 is connected to memory die 0 and, processor channel 0 is connected to memory die 1. But he Clock Enable signal (CKE_Px) is exchanged, i.e. Processor CKE0_P0 is connected to Memory CKE_A and CKE0_P1 is connected to CKE_B.
Will this configuration work? Or is there any other LPDDR supported?
Thanks in advance.