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DSB macro usage in ENET_DriverIRQHandler()

Question asked by Simon Walke on Jun 13, 2019
Latest reply on Jun 19, 2019 by Hui_Ma

In ENET_DriverIRQHandler() the DSB fix for ARM errata 838869 appears twice in a row.

 

I have two questions:

 

1) Why is this Data Synchronisation Barrier required twice in succession ?

 

2) Why isn't the Cortex M7 included in this fix ?

 

void ENET_DriverIRQHandler(void)
{
ENET_CommonFrame0IRQHandler(ENET);
/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
exception return operation might vector to incorrect interrupt */
#if defined __CORTEX_M && (__CORTEX_M == 4U)
__DSB();
#endif
/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
exception return operation might vector to incorrect interrupt */
#if defined __CORTEX_M && (__CORTEX_M == 4U)
__DSB();
#endif
}

 

For reference, here's another place where this errata is addressed in Interrupts.c, but the M7 is explicitly handled as well here...

 

void GPT2_IRQHandler(void)
{
//USER_LED_TOGGLE();

/* Clear interrupt flag.*/
GPT_ClearStatusFlags(GPT2, kGPT_OutputCompare1Flag);

gptIsrFlag = true;
interrupt_counter++;

if(installed_int_handler)
{
installed_int_handler();
}

/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F, Cortex-M7, Cortex-M7F Store immediate overlapping
exception return operation might vector to incorrect interrupt */
#if defined __CORTEX_M && (__CORTEX_M == 4U || __CORTEX_M == 7U)
__DSB();
#endif

}

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