We uses T2080 for test rapidio.
Then about RIWAR register .
Cache coherency is maintained when "snoop local processor" option for WTT is selected in the corresponding RIWAR register.
what is the difference of
|Enhanced read, snoop local processor|
Read,snoop local processor
We found sra demo used default is Read ,can tell me the diff of 0x5 and 0xd
By the way if my app not used dma alloc memory from usdpaa_mem but use reserved memory。
Our system does not use dma_create func, but the reserved address. There is no problem with function sending and receiving nwrite now,but the problem is the speed is too low ,when we copy used memcpy from reserved memory to user space memory. we used mmap to translate phy to virt.