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DWT on S32K11x

Question asked by Catosh on Jun 7, 2019
Latest reply on Aug 1, 2019 by Daniel Martynek

Hi all, 

according to the safety manual, 

Various points here:

I defined on my application the dwt type (wasn't present on S32K11x .h file)

#define DWT_NUMCOMP_VALUE 2u

typedef struct {
__I uint32_t CTRL;
//__I uint32_t RESERVED0[6]; //TODO: this can be changed.
volatile uint32_t CYCCNT;
volatile uint32_t CPICNT;
volatile uint32_t EXCCNT;
volatile uint32_t SLEEPCNT;
volatile uint32_t LSUCNT;
volatile uint32_t FOLDCNT;
__I uint32_t PCSR;
struct {
__IO uint32_t COMP;
__IO uint32_t MASK;
__IO uint32_t FUNCTION;
__IO uint32_t RESERVED;
}NUMCOMP[DWT_NUMCOMP_VALUE];
}DWT_Type, *DWT_MemMapPtr;

 

In ARMv6m there is no cyccnt, cpicnt, exccnt, sleepcnt, sucnt, foldcnt module. But since there is a 6word hole from CTRL address to PCS, I kept the ones from CM4. 

According to ARM, there are n comp, mask and function modules, based on the value from CTRL. I could see that the CTRLval is 2 and not 4 like stated on the ref. manual. 

And ARM does not specify a 32bit "hole" from the end of functionto the start of compx+1. But I saw this on my debugger: 

looks like there is "something" 32 bit from NUMCOMP[0].function to NUMCOMP[1].comp, hence I added the RESERVED in the NUMCOMP structure to have NUMCOMP1 aligned. . 

Question1: Why there is an "hole" and what is there? Maybe I did not read correctly the ARMv6m architecture manual. 

Second point: from debugger I can see the content of DWT->CTRL, but in the code

volatile uint32_t numcomp = DWT->CTRL;

returns 0.

Furthermore, writings from the CPU to the DWT do not update the DWT content (in any register), while writing in the expression tab with the debugger updates and correctly triggers the watchpoint. 

Same issue with DEMCR register: writes from processor are ignored. 

 

Again, according to ARM, 

Question2: is it possible that on the S32K11x family the DWT is accessible only from the DAP and not from the processor?

Question3: if not question 2, which steps do I need to take to enable the DWT from the processor on S32K11x family MCUs?

 

According to ARM, CYCCNT is not present in armv6. But stepping from the debugger, I can see the value of CYCCNT increasing: 

etc.

I am not planning to use it in my application, but I am curious about it: 

Bonus Question4: What's in 0xe0001004 on the S32K11x MCUs?

 

Any hint would be gladly appreciated, 

K.R.

 

Luca.

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