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Question asked by Dario Arcaro on May 31, 2019
Latest reply on Jun 10, 2019 by Dario Arcaro



I'm working on FCCU for MPC5777C microcontroller and I'm trying to generate correctable/uncorrectable fault on RAM. In order to do this, I've followed the code present in this example:




This code injects 1b/2b ECC errors on the RAM memory by the EIM peripheral and I see the results of the errors in the ERM peripheral but I don't see the signaling toward the FCCU. According to my understanding, I expect that fault number 45 or 46 should be latched in the  FCCU_NCF_S1 register because the same are enabled in the

FCCU_NCF_E1 register.

I have read on this forum another couple of questions about this point but I didn't find a solution or a hint. 

Is there someone that can help me understanding better this situation ?

Thanks in advance.


Dario Arcaro