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Question asked by antoine monmarché on May 28, 2019
Latest reply on Jun 5, 2019 by antoine monmarché



I'm using spi_pal demo from SDK S32DS_ARM_v2018.R1.

The master is configured to use FLEXIO SPI.

I have a question related to the CS pin. As you can see on the picture below, the CS is disabled between every bytes.



Is there a way to enable the CS pin as long as the master has data to transmit?

I looked into the FLEX SPI driver but I'm not familliar with it.


From Master side (running on another S32k148EVB board), it seems that the LPSPI IRQ is not triggered when the CS is enabled/disabled. I tryed to confirgure the interrupt on PTB0 using INT_SYS_EnableIRQ and INT_SYS_InstallHandler but it seems that it's never triggered.

Aslo the lpspi Callback is not triggered when the CS pin status change.