Is 0x7FFFF8 the reset vector's address?

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Is 0x7FFFF8 the reset vector's address?

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everkimage
Contributor IV

MCU is MC9S12XEQ512,it's about the offical bootloader.

While upgrading,if S Record's load address is 0x7FFFE0,it will write *(u16 *)(&data[24]) into 0x7FEFF8.

This means the content of  0x7FFFE0+24 = 0x7FFFF8 is the app's Reset vector.

But in the MCU datasheet,FFF8 is the interrupt vector of unimplemented op-code trap.I think,the bootloader should write the content of 0x7FFFFA into 0x7FEFF8,cause it's the COP watchdog reset.

Is it right?

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everkimage
Contributor IV

OK.It's my mistake.

PFlash_Program(u32, u16*) write 8 bytes each time.

So it write dataes at 0x7FFFF8~0x7FFFFF to address 0x7FEFF8~0x7FEFFF.

*(u16 *)(0x7FEFFE) is the application's reset vector,and bootloader get application's entrance from 0xEFFE.

Now it's right.

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dianabatrlova
NXP TechSupport
NXP TechSupport

Hello Everk,

Thank you for the information.

I'm glad you solved your issue.

Best Regards,

Diana

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