I'm using LPC3250 to communicate with my FPGA through EMC interface.
When doing a read operation my data is read as a constant value (in my case specifically 0x0008).
I brought out the EMC pins on board and used a scope to tap the signals, I see that the EMC signals (Figure (1)) are meeting the specified timing requirements as mentioned in the datasheet. But the data latched by the controller is 8 instead of 205.
Following are the EMC configuration details for the above observation.
WAITOEN = 0x2
WAITRD = 0xA
Bus Width = 16 bits
CS Polarilty = Active low
HCLK = 104MHz
I have tried with increasing and decreasing the wait states but nothing seems to work.
Am I missing something here?