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T2080 descreted DDR3 configuration

Question asked by XIJUN GAN on May 25, 2019
Latest reply on May 27, 2019 by ufedor

Hi,

 

  I have a customized board embedded with T2080. On-board there are 10 descrete "MT41K256M16HA-125 IT:E" DDR3L dies for total 4G Bytes capacity (ECC supported). The DDR speed supported is up to 1600MT/s.

 

  1. With the original DIMM configuration in u-boot ("board/freescale/t208xrdb/ddr.h"), U-boot  always failed  to boot and stuck at "Waiting for D_INIT timeout".

 

  2. Then I create a QCVS project to configure and validate DDR configurations. By the default QCVS DDR test case (3 times of 'Write-Read-Compare' for each case), a set of parameters were successfully validated. After apply the settings into u-boot code, u-boot then can successfully boot up (boot into console).

 

  3. Continue to boot Linux, it always failed. Sometimes CRC check of the downloaded uImage failed, sometimes CRC check ok but boot failed(stuck with nothing printed, or Machine Check error raised). It looks like the validated DDR settings are unstable.

 

  4. Back to the QCVS DDR validate project, I select more tests and increase the loop times in the "Choose Tests" tab, then "Start Validation". There were too much errors with "xxx-Turnaround" and "DMA Test" test cases, and finally I couldn't get a all-passed configuration.

 

  5. I tried to modify the settings and validated it again and again. The tough work is on-going for one week and till now I can't get a proper configuration from it. 

 

  Can anyone point me out, any help will be greatly appreciated. 

 

Best Regards,

AGAN

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