AnsweredAssumed Answered

Clarification about ECC in SRAM and Flash

Question asked by Catosh on May 17, 2019
Latest reply on May 30, 2019 by Diana Batrlova

Hi All, 

I am working on S32K11x platform. 

Some question related to safety manual assumptions about ECC (sram and flash):

Assumption: [SM_111] The ECC SRAM reporting has to be enabled by the software
application (in LMEM module), before the safety application starts. [end]

I suppose we are speaking of MCM_LMDRx here, since S321K11x do not have LMEM. 

In MCM_LMDRx for S32K11 the control field CF0 is reserved and read-only. The implication is that the ECC on SRAM_H is enabled by default in CM0 read and write family, and I can only enable or disable the interrupt generation in the error reporting module?

Then, in MCM_LMPECR I can see that ER1BR anc ERNCR:


This bit field is Reserved and Read-Only 0 for S32K11x variants. This bit field cannot mask ECC reporting, as a result the ECC would always be reported.


This is not clear for me. This refers to MCM_LMPEIR interrupts, because:

For S32K11x variants, MCM interrupt for ECC is not supported and this register only captures the event.


But then in ERM I can see that I can enable interrupts for ch0 for both correctable and non-correctable errors. Hence the reporting is enabled and notified in ERM module and not in MCM_LMEM for S32K11x mcu?

If the reporting is not activated, the correction of single correctable errors is still active? 


Then speaking about the Flash memory: 
It's not really clear for me the meaning of Assumption SM_119 in Safety manual rev.4: 

Assumption: [SM_119] The Flash memory ECC failure reporting path should be checked to validate if detected ECC faults are correctly reported. [end]

What's the meaning og the "Flash failure reporting path" since there is no EIM for the flash memory? 

Furthermore, this is a runtime check. Shall I perform this check once for FTTI or only before the activation of the mem controller or before reading data from flash?

Information about ECC flash events is provided in the FERSTAT of FTFC, is this part of the "failure reporting path"?

I'll be glad to have More information on this points.


[EDIT]: in FERCNFG the FDBFD field looks like it can be used as EIM exactly for this purpose. My fault in not reading it before in the RM.