I'm currently documenting and editing my DCD SDRAM configuration file for my RT1050 project (which I'm currently running on an EVKB). I see that the SDK sets SEMC_MCR (402F_0000) to 0x10000004, which sets bus timeout, command timeout, and module enable, and sets DQSMD (DQS mode) to 1, which selects looping back the dummy read strobe from the DQS pad (presumably GPIO_EMC_39).
I can see that in a previous iteration of this DCD file, the register was set to 0x1000E000, which sets DQSMD to 0, selecting an internal loopback of the dummy read strobe. (It also sets bits 15-8 to 0xE0, which are reserved in the latest RT1050 manual.) I realize this may be an artifact of rev. 0 silicon.
Is it legal/OK to set DQSMD to 0 (internal loopback) with rev. 1 silicon and the EVKB? If it is, can the GPIO_EMC_39 pad be used as GPIO in this case? Thanks.