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CLK_1M_ERR_ FL is set while enabling 1MHZ clock output

Question asked by maniram nagothi on May 7, 2019
Latest reply on Jun 3, 2019 by Jorge Antonio Alcala Vazquez

This particular bit CLK_1M_ERR_ FL is set while enabling the 1MHZ clock, i could not understand the exact meaning of this particular discription.

"Flag indicates that the count_1m count wasn't reached within 1 32kHz period. This is intended as
feedback to software that the HW_ANADIG_OSC_CONFIG2_COUNT_1M_TRG value is too high for the
RC Osc frequency."

 

can you please help me by explaining what this particular error and why is it coming and i am referring the example code "evkbimxrt1050_flexio_i2s_edma_transfer" from where i had taken the particular lines and added in my code

void BOARD_BootClockRUN(void)

 CLOCK_SetRtcXtalFreq(32768U);
/* Enable 1MHz clock output. */
XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK;
/* Use free 1MHz clock output. */
XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK;
/* Set XTAL 24MHz clock frequency. */
CLOCK_SetXtalFreq(24000000U);

 

can you also share the points on what are things need to be checked to rectify the error.

 

Thanks,

maniram

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