Using the 8080 display interface on i.MX RT1020

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Using the 8080 display interface on i.MX RT1020

Jump to solution
2,936 Views
alexander6
Contributor I

Hello,

I'm currently trying to figure out how to add a display (driven by the 8080 8/16-bit parallel interface) to the i.MX RT1020. As far as I understood, there are essentially three ways to connect it to the processor:

  1. SEMC in DBI-B mode
  2. FlexIO with 8080 display interface driver (seems not to be included in the SDK)
  3. Bit-banging the protocol

Going through the list of options, I prefer 1) and 2) since 3) would consume too many cycles.

Since an external SDRAM chip at 166MHz, DTR will be connected to SEMC, the module itself must run at 166MHz. However, comparing the control registers which offer up to 16 cycles for each listed action with the ILI9341's datasheet on page 228, operations over 96ns require more cycles. Although memory reads are likely to be rare, full command support would be better. Also, how does addressing on the 8080 interface work? I wonder since data should be written in huge bursts but section 24.4.1.33 shows 'column address bit width' and 'burst length'. What do they control?

In the case it won't work, I need to use FlexIO. Does FlexIO support multiple protocols at the same time or are the big number of pins meant to be used for parallel interfaces?

Thanks in advance,

Alex

Labels (2)
0 Kudos
1 Solution
2,116 Views
jeremyzhou
NXP Employee
NXP Employee

Hi Alex Münnich,

Thank you for your interest in NXP Semiconductor products and
the opportunity to serve you.
Q1) About the 8080 interface implementation, I'd like to suggest you refer to a similar question which has been answered on our NXP community, so please refer to https://community.nxp.com/thread/497507 to view the details.
Q2) Does FlexIO support multiple protocols at the same time or are the big number of pins meant to be used for parallel interfaces?
-- Yes, FlexIO is able to emulate to the parallel interface.

Have a great day,
TIC

 

-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

 

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
-------------------------------------------------------------------------------

View solution in original post

3 Replies
2,117 Views
jeremyzhou
NXP Employee
NXP Employee

Hi Alex Münnich,

Thank you for your interest in NXP Semiconductor products and
the opportunity to serve you.
Q1) About the 8080 interface implementation, I'd like to suggest you refer to a similar question which has been answered on our NXP community, so please refer to https://community.nxp.com/thread/497507 to view the details.
Q2) Does FlexIO support multiple protocols at the same time or are the big number of pins meant to be used for parallel interfaces?
-- Yes, FlexIO is able to emulate to the parallel interface.

Have a great day,
TIC

 

-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

 

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
-------------------------------------------------------------------------------

2,116 Views
jackking
Senior Contributor I

You should also look at the other thread I posted on parallel FlexIO:  Parallel GPIO examples for IMXRT? 

Jeremy posted an example project for 8080 LCD interface on the IMXRT and it works well.

Based on the timing specs of the controller I used (ST7789) I was able to set FlexIO beat rate to 20MHz, using either 8-bit or 16-bit width.

FlexIO could go much higher, but the ST7789 started behaving unpredictably above it's rated spec (150nS per write cycle).

0 Kudos
2,116 Views
alexander6
Contributor I

Hi Jeremy,

thanks for your quick response, I really appreciate it. Turns out that when transferring a whole frame to the LCD driver (240x320x18 / 12 = 115200 bits per frame), the SEMC pipeline is stalled for 7.6ms 60 times per second, preventing the CPU almost half a second per second from accessing SDRAM. Therefore, offloading the overhead to the FlexIO module is the best choice.

Great to hear the module allows parallel transfers so I'll try to utilize 18+4 pins for display communication.

Thank you for your help and have a nice day,

Alex

0 Kudos