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i.MX6Q 2GB DDR TEST

Question asked by kane shi on May 4, 2019
Latest reply on May 5, 2019 by igorpadykov

We have a custom board very similar to the imx6q Sabred reference design. We used 4 MT41K512M8 DDR chips。

When we perform DDR calibration, the following is displayed.

DDR TEST TOOL LOG

DDR Freq: 396 MHz

ddr_mr1=0x00000000
Start write leveling calibration...
running Write level HW calibration
Write leveling calibration completed, update the following registers in your initialization script
MMDC_MPWLDECTRL0 ch0 (0x021b080c) = 0x00150015
MMDC_MPWLDECTRL1 ch0 (0x021b0810) = 0x0022001B
MMDC_MPWLDECTRL0 ch1 (0x021b480c) = 0x0010001E
MMDC_MPWLDECTRL1 ch1 (0x021b4810) = 0x000D001B
Write DQS delay result:
Write DQS0 delay: 21/256 CK
Write DQS1 delay: 21/256 CK
Write DQS2 delay: 27/256 CK
Write DQS3 delay: 34/256 CK
Write DQS4 delay: 30/256 CK
Write DQS5 delay: 16/256 CK
Write DQS6 delay: 27/256 CK
Write DQS7 delay: 13/256 CK


It seems to be stuck here, and there is no output after that.How to solve this problem?

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