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EMC Address to Address Line Translation External SDRAM

Question asked by Praveenth Sanmugarajah on May 2, 2019
Latest reply on May 7, 2019 by Praveenth Sanmugarajah

Hello guys,

 

I am currently using the LPC4370 with 4 external SDRAMs. I am using the following configuration 32Mx16 4BANKS 13ROWS 10COLS (32bit external bus high performance address assignment row, bank, column). Two 16-bit SDRAMs are connected to a dynamic chip selection, so I have twice a 32-bit external memory architecture. I can read and write all external SDRAMs with the addresses: 0x28000000 - 0x37FFFFFF

 

I'd like to know the translation of the address range into row and column and bank.

 

I did some measuremnets:

 

I wrote data to the addresses 0x28000000, 0x28000004, 0x28000008, 0x2800000C and few other addresses to have independent write access. (See figures below)

I write always a 32-bit number on the external SDRAM.

 

No address lines were used for the above mentioned addresses (0x28000000-0x2800000C) (== no signal was seen on the oscilloscope).

When writing to address 0x2800000010, address line A2 was active (expected behavior).

How is it possible that the address lines A0 and A1 are never activated when writing addresses 0x28000000, 0x28000004, 0x28000008, 0x2800000C (I also checked other 14 address lines, none of them seem to be activated)?

 

My expectation is that for writing to 0x28000004 the address line A0 should be enabled, writing data to 0x28000008 A1 should be enabled and writing data to 0x2800000C A0 and A1 should be enabled.

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