I have a question regarding to getting details about 'LDG (Guarded Load Instruction)'
First of all we are using P2041 as the processor and according to
'E500MC Core Reference Manual, Rev. 3' document, Machine Check Syndrome Register (MCSR) has
a field named 'LDG'.
We receive the LDG bit of MCSR without the LD bit set and we couldn't identify the error. Set only if the error encountered by the load was an L2 or CoreNet error.` So if LDG field is set without the LD then that means we have error related to L2 or CoreNet. Therefore, when we saw the LDG field is set, we read the following registers to identify where the issue is.
For the CoreNet Part:
For the L2 Part:
But according to our readings, those registers do not indicating any error. They are all clear.
So the question is are we missing any register that could help us to find the issue?
We are using 'QorIQ P2040 Reference Manual, Rev.4' as a reference for the CoreNet registers.