Hi, instead of overlay MPC5777C use "old" approach using MMU virtual address translation to redirect certain address space to different place. I have copied out the a chapter fro MPC5644A VertiCAL Guide that describing it quite clearly, I think.
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8. MMU Mapping of Calibration Data
Engine calibration data is typically stored as constant data located within internal flash. During engine calibration
this data is manipulated in real time, and therefore needs to be relocated to SRAM to achieve this. The VertiCal
connector provides the mechanism to connect to an external SRAM, however the Memory Management Unit
(MMU) provides the seamless integration of this with software.
The MMU works on the principal of "Effective" (i.e. virtual) memory addressing and "Real" (i.e. physical) memory
addressing. The core, and therefore all software run on the core, uses the Effective memory addressing. All
resources external to the core, such as the eDMA and peripherals, use Real memory addressing. The MMU is
located within the core and interfaces between Effective memory pages and Real memory pages, providing flexible
routing between the different page types. The MMU allows users to setup memory pages by creating Translation
Lookaside Buffer (TLB) Entries, and specify the address, size and permissions for this memory space.
Typically an MMU entry would have a matching Effective page number (EPN) and Real page number (RPN). For
example, the following EPN and RPN in a TLB entry would create a memory page for internal flash.
• Effective Page Number (EPN) = 0x0000_0000
• Real Page Number (RPN) = 0x0000_0000
If software in the core accessed a resource at address 0x0000_0004, then this is treated as the physical. The MMU
will translate this to the RPN, which in this example is the same, and therefore accesses internal flash at the address
0x0000_0004.
During calibration, data stored in the internal flash will need to be re-mapped to the external SRAM. The MMU
allows this to be done with minimal software overhead. When calibration begins, software could remap the Real
Page Number from internal flash to the external SRAM. Continuing the above example, if the MMU re-mapped the
memory then the updated TLB Entry would have these properties:
• Effective Page Number (EPN) = 0x0000_0000
• Real Page Number (RPN) = 0x4000_0000
Software would still attempt to access the resource at the address 0x0000_0004, however the MMU would translate
this and perform the access to the physical address 0x4000_0004, an address in the external SRAM.
