s32k144 SPI2 读写失败

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s32k144 SPI2 读写失败

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majunwei_1989
Contributor I

Hi NXP Team,

     我用s32k144的SPI2总线操作AT45db041d存储芯片时,数据读写不成功,一直找不到原因,但是我用IO口模拟SPI操       作 AT45db041d存储芯片时是可以正常读写的,下面是我的SPI配置代码,麻烦各位大神指正下哪里配置的有问题。附       件为我的详细代码。

      疑问1;AT45db041d的片选引脚连接的PA9,我是软件来操作,还需要配置成SPI2的复用功能吗,还是直接配置成普                    通  IO口就行了,请大神解答?

void Spi2Init(void)
{
PCC-> PCCn[PCC_PORTA_INDEX] |= PCC_PCCn_CGC_MASK; /* Enable clock to PORT A */
PCC-> PCCn[PCC_PORTE_INDEX] |= PCC_PCCn_CGC_MASK; /* Enable clock to PORT E */

PORTA->PCR[9] |= PORT_PCR_MUX(3); //PCS0
PORTA->PCR[8] |= PORT_PCR_MUX(3); //SOUT
PORTE->PCR[16] |= PORT_PCR_MUX(3); //SIN
PORTE->PCR[15] |= PORT_PCR_MUX(3); //SCK

// iHalSetPinMode(PORT_A, PIN9, OUTPUT_PP);//Spi_CS
// iHalSetPin(PORT_A, PIN9); //
iHalSetPinMode(PORT_E, PIN11, OUTPUT_PP); //RST
iHalSetPin(PORT_E, PIN11); 

PCC->PCCn[PCC_LPSPI2_INDEX] = 0; /* Disable clocks to modify PCS ( default) */
PCC->PCCn[PCC_LPSPI2_INDEX] = 0xC6000000; /* Enable PCS=SPLL_DIV2 (40 MHz func'l clock) */

LPSPI2->CR = 0x00000000; /* Disable module for configuration */
LPSPI2->IER = 0x00000000; /* Interrupts not used */
LPSPI2->DER = 0x00000000; /* DMA not used */
LPSPI2->CFGR0 = 0x00000000; /* Defaults: */
 LPSPI2->CFGR1 = 0x00000001; /* Configurations: master mode*/
LPSPI2->TCR = 0x0000000F; /* Transmit cmd: PCS3, 16 bits, prescale func'l clk by 4, etc*/
LPSPI2->CCR = 0x04090808; /* Clock dividers based on prescaled func'l clk of 100 nsec */
LPSPI2->FCR = 0x00000003; /* RXWATER=0: Rx flags set when Rx FIFO >0 */

LPSPI2->CR = 0x00000001; /* Enable module for operation */
}

void SPI_WriteByte(uint8_t data)
{
         while((LPSPI2->SR & LPSPI_SR_TDF_MASK) >> LPSPI_SR_TDF_SHIFT == 0);
         LPSPI2->TDR = data; /* Transmit data */
         LPSPI2->SR |= LPSPI_SR_TDF_MASK; /* Clear TDF flag */
}

uint8_t SPI_ReadByte(void)
{
         uint8_t ucByte = 0;


         while((LPSPI2->SR & LPSPI_SR_RDF_MASK) >> LPSPI_SR_RDF_SHIFT == 0);

         ucByte = LPSPI2->RDR; /* Read received data */
         LPSPI2->SR |= LPSPI_SR_RDF_MASK; /* Clear RDF flag */


         return ucByte;
}

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dianabatrlova
NXP TechSupport
NXP TechSupport

Hi Wem,

If you provide your question in English it will be better to understand.

However, you have correctly configured the PTA9 as PCS0.

Could you please share your SPI master transfer the data on the bus?

Do you have correctly set the CHA and CPOL bit in TCR register according to the slave requirements?

 

Thank you.

Best Regards,

Diana

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