Is there a simple way to inject a machine check exception in the MPC5554 (e200z6 core)? I need to test handling to understand the difference in behavior when the MSR[ME] bit is 0 instead of 1.
The e200z6 core manual provides the following definition for the MSR[ME] bit:
However, the MPC5554 provides 2 additional sources of machine check exception:
It's not clear to me how to simulate these conditions. What I need to know primarily is what will happen if the MSR[ME] bit is disabled? Will the conditions that normally cause the machine check exception to be taken all result in checkstop instead? Can anyone provide a simple example of code that results in a machine check condition?