Now, I have a MMU TLB entry definition for the SRAM as : TSIZE of 128K and cacheable.
I would like create a new region of i.e 2KB of SRAM uncacheable. So at the end, I would have 2 regions one of 126KB and the second of 2KB.
As my understanding, the MMU can't be used because the granularity (TSIZE 64K or 128K) is too big. So I need to use the MPU to create such region, right ? Or I'm totally wrong ?