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1588 and DPDK

Question asked by Raymond Yeung on Apr 15, 2019
Latest reply on Jul 4, 2019 by Yiping Wang

How is 1588 (V2) hardware timestamping (Rx and Tx) controlled in the presence of DPDK that bypasses low level Ethernet driver?  Any white paper on this topic?  I'd like to know both the master and the slave sides.

Also any driver support for system time error correction (error w.r.t. to very accurate time source, e.g. GPS 1PPS)?