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LPC54616 MCAN and Bus Off

Question asked by Jay Schwichtenberg on Apr 15, 2019
Latest reply on May 2, 2019 by Jay Schwichtenberg



I've been working on some MCAN code for the LPC54616 using the 2.5.0 SDK MCAN drivers. I have my code working in both internal and external loop back. When I take the code out of internal/external loop back and connect ports 0 and 1 together via a cable it doesn't work for me. There was old code that was used to verify the hardware using the old can.c/can.h drivers which worked (with the cable) but with the fsl_mcan drivers I get the bus off happening and the INIT bit set in the CCCR. I assume this is because of the error count in the ECR register.


In the code the clocking is set as:


/* attach 12 MHz clock to FLEXCOMM0 (debug console) */




// MCU clock is 12 MHz, from schematics run at 96 MHz, MCAN example used 48 MHz


/* Set MCAN clock 96/12=8MHz. */
CLOCK_SetClkDiv( kCLOCK_DivCan0Clk, 12U, true );
CLOCK_SetClkDiv( kCLOCK_DivCan1Clk, 12U, true );






I've attached a file with the MCAN registers showing the registers at various stages.

  • OPEN(0) is for port 0 and OPEN(1) is for port 1.
  • After the registers there is a TX of a single byte frame of 0x60.
  • Then some of the registers in the callback for port 1. These show the off line bit in the CCCR being set. There are other indications of errors in the IR and PSR registers too.
  • Then there is the registers for both ports before they are shut down. For port 1 (CLOSE(1)) the ECR port has the RX error count maxed out.


So would someone have any ideas of things to look at or knowledge of issues on getting MCAN to work?


Thank is advance.

Jay S.