We have custom board with sja1105PEL on it.
After everything was done as described in manual we have problem at configuration stage.
We need to clarify some points:
sja1105 SPI interface connected to FPGA IO ports.
Dose sja1105 have power on or reset sequence befor or in time of cofiguration process?
At this moment we have that sequence :
1. power on and RST_N with TRST_N pulled UP so device is active and out of reset from the first moment.
2. after some time configuration start.
Problem is that we cant read from device. We try to read device ID or status register before or after first block loded and no success.
1. ss_n down
2. half of clk before first rising edge on sclk
3. 64 ticks of sclk at 10MHz.
4. at first 32 ticks address loaded in SDI port as 0x02000000 (read one long-word from address 0x0) or 0x02000010 (read one word from address 0x1)
next 32 ticks on SDI should be ignored and we should take answer from SDO port but...
5. SDI still mirrored to SDO as at time of writing operation.
6. half clk from last falling edge.
7. ss_n up.
Could it be device defect?
In manual stated that MSB go first but dose not mentioned about byte order. We use most significant byte first by default.
During configuration we read status register after every block loaded. Next block write should start from next address. Dose address of avery data long-word incremnt by one? Or by 4 as byte memory write? For example:
load first block with device ID to address 0x20000. It has 10 long data words so after ID + header + crc + data + crc we have 15 long words loaded. Then read status register. Then next block should be written to 0x2000F or 0x2003C?
Dose sja1105 have some test sequence to check for device defects?