I have problems setting the SCK frequency for LPSPI on RT1051.
here is my configuration:
I am quite sure about PLL3_PFD0 because I can indirectly measure it on CLKO2 pin:
Using SDK 2.4 APIs I set the LPSPI for a SCK running @25MHz, I debug it step-by-step to verify. The registers are:
And this should be correct, the nearest frequency is 24MHz
but on my oscilloscope I see (green is SCK and cyan is CLKO2):
As expected CLKO2 is 30MHz (so FLEXSPI_ROOT_CLK sould be 120MHz, so PLL3_PFD0 should be 720MHz)
But SCK (the green one) is 12MHz... a half of expected 24MHz
but I try to change only the mux:
Now the actual SCK should be 21.12MHz (the registers are the same values)
And on the oscilloscope I see
that is correct.
So where am I wrong? Why with PLL3_PFD0 I have SCK frequency half of what expected?