Mark Butcher

FlexBus on M5225X and MRAM

Discussion created by Mark Butcher on Jan 27, 2009
Latest reply on Feb 9, 2009 by John Weil
Hi All

After just completing some work with the mini FlexBus on the M52259EVB I have a few comments / questions.

1)  I notice that the CS0 is set up to allow booting from an external ROM. Although this is probably not of any real use to the M5225x I was wondering whether there is a method of actually making it do this? I understand that a configuration pin (for example) would have to force the ports to the FlexBus mode and validate the CS0.

2) The user's guide chapter to the FlexBus is general and the mini FlexBus in the M5225x doesn't support all details. Can any one confirm that it doesn't support peripheral Transfer acknowledge? I couldn't find a pin for this so believe that it can thus only work with automated timing via wait states.

3) A minor detail, but I will mention it for completeness: in the user's guide the reset state of CSCR1 is given as 0x00000120 but I was reading 0x00000000 after reset. CSCR0 was reading 0x003ffd20 as in the user's manual.

4) I set up a file system in the MRAM on the EVB to server web pages as a test of the FlexBus. With zero wait states I was getting accesses of about 28ns (CS active time - PLL is 80MHz) which is too fast for the MRAM; with 1 wait state 52ns and with 3 wait states 72ns. I left it operating with 2 wait states since this should be OK for 35ns MRAM. However there are no measurement points on the board for the FlexBus (apart from a jumper for the MRAM_CS line) so I didn't measure the relationship between all signals (Address, Data). Does anyone know the optimum setting for the wait states in this case?

5) Finally I could confirm that the data transferes between the MRAM and CPU via FlexBus, based on DMA, work correctly. This is good to know since a fast transfer of big data blocks is thus possible without CPU intervention.

I also added a short report here: