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Question about i.MX6Q/QP errara ERR004536.

Question asked by Takayuki Ishii on Apr 8, 2019
Latest reply on Apr 9, 2019 by Takayuki Ishii

Hello community,

 

I have some questions about i.mx6DQ and i.MX6DQP errata IMX6DQCE.

From rev 6 to rev 6.1 it have modified about ERR004536.

 

  I have no file of IMX6DQCE rev6.

  Only rev6.1 and rev7 I have.

 

In table 2. it say that 

 1) "removing i.MX6Dual/Quad Only.", that's meen it have both i.MX6Dual/Quad and i.MX6DualPlus/QuadPlus

    have this errata. is it correct?

 

 

2) It say that "from: Silicon revision 1.3 to; No fix scheduled".

  In Linux BSP, to fix this issue, it has modified to set bit7 of 0x6C register as following.

 

https://source.codeaurora.org/external/imx/linux-imx/commit/?h=git.kernel.org/linux-stable/linux-5.0.y&id=18094430d6b50432591906784d51bb605982b8d8

 

But newest post of git it will be modified to clear bit7 as following.

 

https://source.codeaurora.org/external/imx/linux-imx/commit/?h=git.kernel.org/linux-stable/linux-5.0.y&id=e30be063d6dbcc0f18b1eb25fa709fdef89201fb

 

Which is correct to set bit[7] = 1 or bit[7] = 0?

It have no information about this register address offset of 0x6C in reference manual.

 

I look forward to hearing from you.

 

Best regards,

Ishii.

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