Hi,
I am using S32 Design Studio.
S32 Design Studio for Power Architecture
Version: 1.2
Build id: 170613
(c) Copyright Freescale Semiconductor 2016. All rights reserved.
(c) Copyright NXP 2017.
MCU == MPC5777C
evb == MPC5777C EVB
debugger == Multilink universal fx
Operating System == Win7x64,Win8x64
Case 1:
System clock : 192 MHz(PLL0)
DSPI module Clock : 96 MHz
PER CLK SELECT : PLL0
PER CLK : 96 MHz
SCK BAUD RATE : 4 MHz
In this case the Data send on MOSI line is received properly on MISO line.
Case 2:
System clock : 264 MHz(PLL1)DSPI module Clock : 132 MHz
PER CLK SELECT : PLL0
PER CLK : 96 MHz
SCK BAUD RATE : 4 MHz
In this case the Data send on MOSI line is not received properly on MISO line.
In both the case SCK baud rate is same which is derived from PER CLK but module clock is different.
Is DSPI module clock has any effect on data send and receive functionality?
Hi, case 2 is out of maximum allowed DSPI frequency.
See datasheet screenshot below