NOTE : this is quite a long question, I apologize and thank for answering first. Thanks!
We used u-boot, kernel with 4.9.88 and 4.9.123 on imx8mq-evk board before,
and recently, we update both our u-boot and kernel to 4.14.88.
It works with default parameter, and original micron lpddr4 3GB DRAM.
However we face to some issue with different setup below.
1. ddr folder disappeared in u-boot ver. 4.14.88.
In 4.9.88 and 123, we generate our ddr_init.c and ddr4_training.c files and put it to
/board/freescale/imx8mq_evk/ddr/ folder, in order to customize our speed an timing.
However, we found that ddr folder is removed from ver 4.14.88, we did found that there is a new
folder called /board/freescale/imx8mq_arm2/. and inside it having ddr/ddr4/ folder,
which include ddr_init.c and ddr_traing.c files. But not sure it's the correct place to replace the files.
Another thing relate to this one is that, we found from ver4.9.123 and above( including 4.14.88),
driver/ddr/imx8m/ was created, however, 4.9.88 didn't having this driver !
Moreover, in the driver having lpddr4_training.c (not ddr4_training.c)and ddr_init.c.
Again, maybe here is the place to replace ?
2. Bug? DDR Stress Tool V21 can only generate ddr4_init.c and ddr4_training.c for ver 4.9.51?
When we using Stress tool to Gen the training file.
If we using "CODE" mode, it will gen the code with comment said it's 2017 for 4.9.51.
When we compared it with origin ddr4_* code in u-boot ver 4.14.78 source code, there are pretty different !
So, we doubt that v21 can support ver 4.14.78 or not?
If we using "ARRAY" mode. it will come out with lpddr4_timing.c file,
which used in ver4.14.78, in folder ./board/freescale/imx8mq_evk/ , and read by driver/ddr/imx8m/ddr4_init.c.
It seems it did the same thing of ./board/freescale/imx8mq_evk/ddr/ddr_init.c when it was ver 4.9.88/123,
but with for loop.
Maybe this is the correct way to set DRAM setting registers for lpddr4 + ver 4.14.78 u-boot ??
(and ddr_init.c / ddr_training.c is no longer used in 4.14.78? )
3. Does ddr4 and lpddr4 setting and operation been separated in v4.14.78?
Like I mentioned above, it seems NXP is trying to separate the lpddr4 setting from ddr4.
Could anyone advise what's the lpddr4 setting and related code in ver4.14.78 ?
It seems ddr4 and lpddr4 were not separated clearly now, and quite confused...
since in old version they using the same training file and init file as well as driver.
BTW, It seems imx8 stuff was created step by step in newer version, which is great.
We confused that we can't find imx8m code in old version, which only having imx7 and imx6 code.
Anyway, thanks for reading, hope someone can answer the question.