Possible incosistence into MPC5777C Reference Manual (Chapter 39 - IGF / Falling threshold register)

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Possible incosistence into MPC5777C Reference Manual (Chapter 39 - IGF / Falling threshold register)

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enricoferrari
Contributor II

Trying Input Glitch Filter (IGF), of MPC577C, it looks like each the IGF's channels has its own IGF_FTHR register;

whereas MPC5777C Reference Manual (Document Number: MPC5777CRM / Rev. 8.1, 09/2018 - Chapter 39

Input Glitch Filter (IGF)), defines only one IGF_FTHR register per each IGF module (IGF_0 or IGF_1), see yellow marked text into  below extracts from reference manual.

I didn't find any related "errata", so I ask if really all IGF channels have proper IGF_FTHR (should be IGF_FTHRn)  register located at the address 0h base + 20h offset + (64d x i), where i=0d to 45d ?

And consequently the Reference Manual should be corrected?

Thank you,

Enrico Ferrari

39.5.png39.5.5 Falling edge Threshold Register (IGF_FTHR).png

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2 Replies

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enricoferrari
Contributor II

Hi Petr,

many thanks for your clarifications/confirmations.

Best Regards,

Enrico Ferrari

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PetrS
NXP TechSupport
NXP TechSupport

Hi Enrico,

yes, this is inconsistency in the RM.  The Falling edge threshold register exist for each channel just like Rising edge threshold register.
Falling edge threshold register address can be calculated as "Address: 0h base + 20h offset + (64d × i), where i=0d to 45d"

The RM needs to be updated to include a Ffalling threshold register for each channel. There has already been a docs ticket submitted about this.

BR, Petr