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About additional quiescent supply current of PCAL6524

Question asked by Kazuhiro Ozuchi on Mar 18, 2019
Latest reply on Mar 20, 2019 by Jose Alberto Reyes Morales

In p.6 of the data sheet for PCAL6524 has the following description of additional quiescent supply current.

ADDR, SCL, SDA, RESET; one input at VDD(I2C-bus) - 0.6 V, other inputs at VDD(I2C-bus) or VSS; VDD(P) = 1.65 V to 5.5 V

max 25uA


P port; one input at VDD(P) - 0.6 V, other inputs at VDD(P) or VSS; VDD(P) = 1.65 V to 5.5 V

max 80uA

It is a very high current as a quiescent supply current, but does it mean that a large quiescent supply current will flow if one port is 0.6 V lower than VDD?



The above-mentioned quiescent supply current does not occur if input voltage is within VDD-0.6V?