#define CAN0 0x0140;
#define CANCTL0 0X00 #define CANCTL1 0X01 #define CANBTR0 0X02 #define CANBTR1 0X03 #define CANRFLG 0X04 #define CANRIER 0X05 #define CANTFLG 0X06 #define CANTIER 0X07 #define CANTBSEL 0X0A #define CANIDAC 0x0B #define CANIDAR0 0x10 #define CANIDAR1 0x11 #define CANIDAR2 0x12 #define CANIDAR3 0x13 #define CANIDMR0 0x14 #define CANIDMR1 0x15 #define CANIDMR2 0x16 #define CANIDMR3 0x17 #define CANIDAR4 0x18 #define CANIDAR5 0x19 #define CANIDAR6 0x1A #define CANIDAR7 0x1B #define CANIDMR4 0x1C #define CANIDMR5 0x1D #define CANIDMR6 0x1E #define CANIDMR7 0x1F
CANInit(CAN0);
_IO(CANm + CANCTL1) |= 0x80;
#ifndef _BASE#define _BASE 0#endif#define _IO(x) @(_BASE)+(x)
#include <iosdp256.h> /* contains register definitions */ /* for the 9S12DP256 */ void CANInit(unsigend char CANm) { _IO(CANModule + CANCTL0) |= 0x01; // Enter Initialization-Mode _IO(CANm + CANCTL1) |= 0x80; // Enable CAN module CAN0 } CANInit(CAN0);
#define _IO(x) @(_BASE)+(x)
#define _IO(x) (*(volatile char*)(_BASE + x))
volatile __uchar CAN0CTL0 _IO(0x140); /* CAN0 control register 0 */volatile __uchar CAN0CTL1 _IO(0x141); /* CAN0 control register 1 */volatile __uchar CAN0BTR0 _IO(0x142); /* CAN0 bus timing register 0 */ ...... .... ... .. .
void CANInit(void){ CAN0CTL0 = 0x01; // Enter Initialization Mode CAN0CTL1 = 0x80; // CANE = 1 THE MSCAN module is enabled} CANInit();
volatile __uchar CAN0CTL0 _IO(0x140); /* CAN0 control register 0 */
#define _BASE 0 #endif#define _IO(x) @(_BASE)+(x)volatile __uchar CAN0CTL0 _IO(0x140); /* CAN0 control register 0 */
#define CAN0 0x0140 // First address for MSCAN0 #define CANCTL0 0X00 // Control register 0
CANInit(CAN0);// CANInit(0x140}; CANInit(CANm) { _IO(CANm+CANCTL0) |= 0x01; //_IO(0x140+0x00) |= 0x01; }
#define CANCTL0(base) _IO(0x00+base); // in iosdp256.hCANInit(CAN0); //CANInit(0x140); CANInit(CANm){ CANCTL0(CANm) |= 0x01; //CANCTL0(0x140); }
typedef volatile unsigned char* CAN_port; #define CAN0 (&CAN0CTL0) #define CAN1 (&CAN1CTL0) #define CAN2 (&CAN2CTL0) #define CAN3 (&CAN3CTL0) #define CAN4 (&CAN4CTL0) #define reg_CANCTL0(x) (*((CAN_port)x + 0x00)) /* Control Register 0 */ #define reg_CANCTL1(x) (*((CAN_port)x + 0x01)) /* Control Register 1 */ #define reg_CANBTR0(x) (*((CAN_port)x + 0x02)) /* Bus Timing Register 0 */ #define reg_CANBTR1(x) (*((CAN_port)x + 0x03)) /* Bus Timing Register 1 */ #define reg_CANRFLG(x) (*((CAN_port)x + 0x04)) /* Receiver Flag Register */ #define reg_CANRIER(x) (*((CAN_port)x + 0x05)) /* Receiver Interrupt Enable Register */ #define reg_CANTFLG(x) (*((CAN_port)x + 0x06)) /* Transmitter Flag Register */ #define reg_CANTIER(x) (*((CAN_port)x + 0x07)) /* Transmitter Interrupt Enable Register */ #define reg_CANTARQ(x) (*((CAN_port)x + 0x08)) /* Transmitter Message Abort Control */ #define reg_CANTAAK(x) (*((CAN_port)x + 0x09)) /* Transmitter Message Abort Control */ #define reg_CANTBSEL(x) (*((CAN_port)x + 0x0A)) /* Transmit Buffer Selection */ #define reg_CANIDAC(x) (*((CAN_port)x + 0x0B)) /* Identifier Acceptance Control Register */ #define reg_CANRXERR(x) (*((CAN_port)x + 0x0E)) /* Receive Error Counter Register */ #define reg_CANTXERR(x) (*((CAN_port)x + 0x0F)) /* Transmit Error Counter Register */ #define reg_CANIDAR0(x) (*((CAN_port)x + 0x10)) /* Identifier Acceptance Register 0 */ #define reg_CANIDAR1(x) (*((CAN_port)x + 0x11)) /* Identifier Acceptance Register 1 */ #define reg_CANIDAR2(x) (*((CAN_port)x + 0x12)) /* Identifier Acceptance Register 2 */ #define reg_CANIDAR3(x) (*((CAN_port)x + 0x13)) /* Identifier Acceptance Register 3 */ #define reg_CANIDMR0(x) (*((CAN_port)x + 0x14)) /* Identifier Mask Register 0 */ #define reg_CANIDMR1(x) (*((CAN_port)x + 0x15)) /* Identifier Mask Register 1 */ #define reg_CANIDMR2(x) (*((CAN_port)x + 0x16)) /* Identifier Mask Register 2 */ #define reg_CANIDMR3(x) (*((CAN_port)x + 0x17)) /* Identifier Mask Register 3 */ #define reg_CANIDAR4(x) (*((CAN_port)x + 0x18)) /* Identifier Acceptance Register 4 */ #define reg_CANIDAR5(x) (*((CAN_port)x + 0x19)) /* Identifier Acceptance Register 5 */ #define reg_CANIDAR6(x) (*((CAN_port)x + 0x1A)) /* Identifier Acceptance Register 6 */ #define reg_CANIDAR7(x) (*((CAN_port)x + 0x1B)) /* Identifier Acceptance Register 7 */ #define reg_CANIDMR4(x) (*((CAN_port)x + 0x1C)) /* Identifier Mask Register 4 */ #define reg_CANIDMR5(x) (*((CAN_port)x + 0x1D)) /* Identifier Mask Register 5 */ #define reg_CANIDMR6(x) (*((CAN_port)x + 0x1E)) /* Identifier Mask Register 6 */ #define reg_CANIDMR7(x) (*((CAN_port)x + 0x1F)) /* Identifier Mask Register 7 */ #define reg_CANRXFG(x) ( (CAN_port)x + 0x20 ) /* Foreground Receive Buffer */ #define reg_CANTXFG(x) ( (CAN_port)x + 0x30 ) /* Foreground Transmit Buffer */
char CANInitMode(unsigned char CANModule){ reg_CANCTL0(CANModule) |= 0x01; while( !CANTestInitStatus(CANModule) ); <- it stopps here return 0; } char CANTestInitStatus(unsigned char CANModule) { return reg_CANCTL1(CANModule) & 0x01; }
stCANInit.CSWAI= 0; // Low power / normal in wait mode (1/0) stCANInit.TIME= 0; // Timer for time-stamp enable/disable (1/0) stCANInit.CANE= 1; // Enable MSCAN! stCANInit.CLKsrc=0; // Clock source: bus/oscillator (1/0) stCANInit.LOOPB= 0; // Loop back Mode for test (ja=1/nein=0) stCANInit.LISTEN= 0; // MSCAN is listen only (ja=1/nein=0) stCANInit.WUPM= 0; // Low Pas filter for wake up (ja=1/nein=0) CANInit(500, stCANInit, CAN_MODULE); // Defined in can.h as CAN0
reg_CANCTL0(port) |= SLPRQ; /* sleep mode */ reg_CANCTL0(port) |= INITRQ; /* init mode */ while((reg_CANCTL1(port) & SLPAK)==0) /* wait until CPU enters sleep mode. */ { ; } reg_CANCTL1(port) |= CLKSRC; /* clksrc=bus */ /* set baudrate, filters & acceptance registers etc... */ reg_CANCTL0(port) &= ~SLPRQ; /* leave sleep mode */ reg_CANCTL0(port) &= ~INITRQ; /* leave init mode */ if(useRxInterrupt) /* if the interrupts are used */ { reg_CANRIER(port) = RXFIE; } while ((reg_CANCTL1(port) & (SLPAK|INITAK)) > 0) /* wait until CAN is running */ { ; }
Hello,
thank you for your help. I changed a few things but it still does not work.
The attachment files are my new can.h and can.c. It still does not work. the programm stopps here:
while((reg_CANCTL1(CANModule) & 0x02)==0) <-- stops here { }
I starts with: CANInit(500, CAN0);.
The value of CANModule in CANinit is 64dec 0x40hex. Is this right? I think it has to be 0x140!?
I can not find the mistake....
Best regards