AnsweredAssumed Answered

i.MX8DX DDR3L compliance

Question asked by Nelson LOJA on Mar 14, 2019
Latest reply on Mar 14, 2019 by jamesbone
Hello Jan,
1) What was the setup that NXP used to validate the design of DDR3L / LPDDR4 with i.MX8 I mean what did you used to have read burst and write burst on the RAM channel ?
2) Was it with this DDR stress tool, or something else?
3) Did you capture the electrical signals with an oscilloscope or a data analyser ?
4) Did you used an interposer for the probes? Did you used S-Parameters
5) Please describe me all your DDR compliance validation setup.