when STFERR detected,can error interrupt is occured.I found that the error interrupt ouccurted so fast (A few microseconds once).
it really affected the execution of my main program.
this is correct behavior. Once any of BIT1ERR, BIT0ERR, ACKKERR, CRCERR, FRMERR and STFERR are detected respective bit is set together with ERRINT. If ERRMSK is set then error interrupt is called.
I can understand this behaver.But my question is it occurts interrupt only just 20 microsecond once. Is this reasonable?
Tasks outside the interrupt can not execute.
sorry I did not get the point. Could you please reword it again.
When ACKKERR and STFERR are detected,ERRINT is occurted.
My question is:
Error interrupts occur too often, about every 20 microseconds, and programs outside of the interrupts don't have enough time to run.
Based on the above facts,I don't think it's too good to have an error interrupt every 20 microseconds.
thanks a lot.
errors are detected during message reception or transmission. So the occurrence depends on bus utilization. How often and what kind of message do you see on the bus?
If the module detect error often, it can point to wrong bit timing setting. I can suggest to check it to be sure all nodes use the same bit timing setting.
I am testing on the bench, single node, no matching resistance，it occurts Persistent STFERR.
if your node is not connected to the bus, you need to connect termination resistor between CANH/CANL lines otherwise message is not properly transmitted and a lot of error are detected. Try to measure CANH/CANL lines with and without termination resistor. With the resistor placed the message will be send periodically because of missing ACK. ACK error is only generated with the message rate.
Maby design as same error occurs interrupt once,next interrupt occurs while new error happening.
That will be fine.
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