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Clock Cycles for Task Execution Appears to be a Function of Clock Rate

Question asked by Andrew Boss on Mar 12, 2019
Latest reply on Mar 13, 2019 by Mark Butcher

I am using a FRDM-KL03Z evaluation board with the MCU Expresso IDE. I have simple code where I am writing to the

GPIOA Port Data Output Register memory address to toggle a GPIO pin ON and OFF. The code that is doing so is pretty simple and is shown below.


volatile uint32_t* GPIOA_Port_Data_Output_Register = (uint32_t *)0x400FF000u;//type cast the GPIOA_PDOR address to pointer

*GPIOA_Port_Data_Output_Register |= 0x80;// Write a 1 to GPIOA_7,  assign the value 0x080 to the pointer

*GPIOA_Port_Data_Output_Register &= 0x7F; ;// Write a 0 to GPIOA_7

*GPIOA_Port_Data_Output_Register |= 0x80;// Write a 1 to GPIOA_7


When I have my bus clock set to 24 MHz (a 41.67 ns period), I see that the GPIO pin is ON for 250 ns, which equates to 6 clock cycles. When I change my bus clock to 8 MHz (a 125 ns period) I see the GPIO pin is on for 376 ns, which equates to 3 clock cycles. I am operating the MCU in run mode. According to Table 5-2 Module Clocks in the KL03 Sub-Family Reference Manual, the GPIO module uses the platform clock as the bus interface clock.


My questions are:

1) The MCU Expresso Clock Perspective does not show a 'Platform Clock'. Is the bus clock the same as the platform clock?


2) Why does the number of clock cycles for the exercise of the GPIO pins vary with the bus clock frequency? It seems the number of clock cycles to execute a task should remain the same, but the time to execute a task should depend on the clock period.