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K12D512 continuously pulses /RESET line.

Question asked by iscan on Mar 11, 2019
Latest reply on Mar 14, 2019 by iscan

Very simple board with a MK12D512VLH5.  I have five prototypes and they all behave the same way.  This is a problem I see others on the forum have encountered with other Kinetis parts and I have read all the relevant threads I can find.

  • I have pull-ups on SWD_DIO,  /RESET and /NMI, pull down on SWD_CLK. Vcc=3.3V
  • On power-up, the /RESET line continuously pulses low (low for 56us, high for 2.8us)
  • I am not able to debug simple code using mcuXpresso - the debugger hangs immediately with this message in the debug window:

Thread #1 57005 (Suspended : Signal : SIGTRAP:Trace/breakpoint trap)          

0xdeadbeee              

 

I can connect with Seggar jlink over SWD using Jlink commander utility with limited functionality.

Output from j-Link Commander V6.42b:

Connecting to target via SWD

InitTarget()

Found SW-DP with ID 0x2BA01477

Scanning AP map to find all available APs

AP[2]: Stopped AP scan as end of AP map has been reached

AP[0]: AHB-AP (IDR: 0x24770011)

AP[1]: JTAG-AP (IDR: 0x001C0000)

Iterating through AP map to find AHB-AP to use

AP[0]: Core found

AP[0]: AHB-AP ROM base: 0xE00FF000

CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)

Found Cortex-M4 r0p1, Little endian.

FPUnit: 6 code (BP) slots and 2 literal slots

CoreSight components:

ROMTbl[0] @ E00FF000

ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB000 SCS

ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 003BB002 DWT

ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 002BB003 FPB

ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 003BB001 ITM

ROMTbl[0][4]: E0040000, CID: B105900D, PID: 000BB9A1 TPIU

ROMTbl[0][5]: E0041000, CID: B105900D, PID: 000BB925 ETM

Cortex-M4 identified.

J-Link>

J-Link>r

Reset delay: 0 ms

Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.

Reset: Halt core after reset via DEMCR.VC_CORERESET.

Reset: Reset device via AIRCR.SYSRESETREQ.

AfterResetTarget()

J-Link>unlock kinetis

Found SWD-DP with ID 0x2BA01477

Unlocking device...O.K.

J-Link>erase

 

**************************

WARNING: CPU could not be halted

**************************

 

Erasing device...

 

**************************

WARNING: CPU could not be halted

**************************

 

 

****** Error: Can not read register 16 (XPSR) while CPU is running

Can not read register 20 (CFBP) while CPU is running

Can not read register 0 (R0) while CPU is running

Can not read register 1 (R1) while CPU is running

Can not read register 2 (R2) while CPU is running

Can not read register 3 (R3) while CPU is running

Can not read register 4 (R4) while CPU is running

Can not read register 5 (R5) while CPU is running

Can not read register 6 (R6) while CPU is running

Can not read register 7 (R7) while CPU is running

Can not read register 8 (R8) while CPU is running

Can not read register 9 (R9) while CPU is running

Can not read register 10 (R10) while CPU is running

Can not read register 11 (R11) while CPU is running

Can not read register 12 (R12) while CPU is running

Can not read register 14 (R14) while CPU is running

Can not read register 15 (R15) while CPU is running

Can not read register 17 (MSP) while CPU is running

Can not read register 18 (PSP) while CPU is running

 

****** Error: Failed to download RAMCode.

Failed to prepare for programming.

Failed to download RAMCode!

ERROR: Erase returned with error code -1.

J-Link>

I have read the “Kinetis Lock issue analysis and unlock way” paper.  It looks like the most obvious problem may be damage from overheating during assembly.  All five prototypes were built using a hot air reflow rework station by an experienced tech.  I have never encountered this problem before with hand-built prototypes but there is always a first…..

 

Q1) Are there any suggestions for resolving this before I try replacing the microcontrollers? 

Q2) Are the Kinetis microcontrollers particularly susceptible than other microcontrollers to damage from overheating?

Q3) Does it make sense that the debug circuitry would work but not the rest of the microcontroller, on all 5 samples?

 

Thanks in advance,

Ian 

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