AnsweredAssumed Answered

Reding TBR registers P2020 CPU

Question asked by Ilya German on Mar 11, 2019
Latest reply on Mar 11, 2019 by ufedor

Hi,

 

I have a quastion regarding reading TBR registers on p2020 e500v2 CPU.

I wrote the following asm instructions:

 

 mftbu   r5      /* Read upper Time Base */
 mftb    r6      /* Read lower Time Base */
 mftbu   r7      /* Read upper Time Base again */

 

When i comliped (using GNU 4.3.3) and viewed the asm instruction I saw that mftbu and mftb were replaced with mfspr instruction.

 

after search in documentation i found in: EREF 2.0: A Programmer’s Reference Manual for Freescale Power Arch Processors (P.504). The following note : mftb was part of the original PowerPc arch, but is being phased out of PowerISA....

 

How did the GNU compilar knew that it should replace the obsolete instruction ? did NXP added a patch to the GNU release ? should i worry that the compilar can change explicitly written asm instructions ?

 

Thanks,

Ilya German

Outcomes