The MPC5777C reference manual describes that the eMIOS CNT register must be initialized with a value in the range 1 to B1, inclusive. From MPC5777C Reference Manual Rev. 8.1, section 220.127.116.11.14, page 1444:
When entering OPWFMB mode coming out of GPIO mode, the internal counter value is
not within that range then the B match will not occur causing the channel internal counter
to wrap at the maximum counter value which is 0xff_ffff for a 24-bit counter. After the
counter wrap occurs it returns to 0x1 and resume normal OPWFMB mode operation.
Thus in order to avoid the counter wrap condition make sure its value is within the 0x1 to
B1 register value range when the OPWFMB mode is entered.
The current implementation of the eMIOS SDK driver, indirectly resets the CNT value to 0 by entering GPIO mode, and then configuring the channel to operate in OPWFMB mode. This initialization sequence does not match the reference manual requirement, and assuming the manual is correct, is a software bug. The correct way to initialize the channel is to explicitly write a CNT register value of 1 after the channel has entered GPIO mode, and then proceeding with the rest of the initialization.
The following image captures the proposed initialization, and confirms that the channel is initialized as prescribed in the reference manual. The steps highlighted in the image are as follows:
1. The channel enters GPIO mode, and the CNT register is automatically cleared.
2. An explicit write with a value of 1 to the CNT register.
3 & 4. The CNT register is read-back to verify that the write was effective. This step is used for testing only and should be excluded from the final driver.
5. The channel is now fully initialized in OPWFMB mode with a correct CNT register value of 1, and the channel prescaler is about to be enabled.
I would like to request that this issue be resolved in the next MPC5777C SDK release.