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exclusive access operations on S32V234

Question asked by on Mar 6, 2019
Latest reply on Mar 7, 2019 by Jehoda Refaeli


I need to know if the S32V234 SoC implements a Global Monitor [0] between the M4 core and the A53’s cores in order to make use of the exclusive access primitives LDREX/STREX [1] when updating the value of a resource (peripheral register) shared between the cores.