I am investigating an interface between the MPC8308 and a 532MT/s DDR2 RAM and I would like to calculate the the total amount of allowed skew from MDQS to a corresponding MDQ signals tDISKEW.
The document MPC8308 PowerQUICC II Pro, Processor Hardware Specification
Document Number: MPC8308EC, Rev. 4, 12/2014
gives on page 11 a formular to calculate tDISKEW from a clock periode and the controller skew (see attached screenshot). However, it is not mentioned whick clock periode shall be used. Is it the MCK clock periode which in my case would be T=1/133MHz giving a tDISKEW of approx. +/-1ns?