I am trying to use a FPGA with MC13202 in stream mode. I used the recommended operation flow in reference manual and found that the chip works well in TX mode(I used a CC2430 based sniffer to watch the packet transmitted). However, the chip does not received the packets correctly (Even if the RSSI is about -65 dbm ).
The problem is, the receiver can receive a lot of wrong packets as well as the packets with correct CRC, and worst of all, after having received certain packets , the receiver cannot receive any more packets (the IRQ is not generated after the trigger). I have checked all the chip status in almost every step (e.g. the IRQ status after the IRQ is generated.) and the chip behaves exactly the same as the RM described.
The RF board I am using is the reference design of 1320xRFC. Since the board can send the packet , I think that is not the problem of the board module or the SPI interface.
Does anyone meet the problem, or can anyone give some advice ?
Message Edited by prometheus on 2009-01-19 12:08 PM