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Power on Sequence for LS2088A

Question asked by Sekuru Naga Venkata Sai Mukhesh on Mar 2, 2019
Latest reply on Mar 3, 2019 by ufedor


I am using LS2088A in a project.

Below is the power on sequencing which I am implementing in my circuit. 

Initially all the IO and PLL power rails (3.3V, 1.8V, 1.35V, 1V_SVDD, 1V_USBSVDD) are released.

After all these power rails are released then the 1V05 core voltage is released and then the 1V2 DDR supply voltage is released.


Please let me know whether this sequence is fine or any correction is required.