Hello,
I'm using the LPC564xx User Manual UM10912 Rev 2.2 for some CAN info. Right now I'm trying to figure out the TX FIFO, queue and dedicated buffer relationship and have a problem with the documentation. To me it seems that sections 35.14.7.3 Tx FIFO and 35.14.7.4 Tx queue on page 756 aren't correct and some of the info in the Tx FIFO section is for the Tx queue.
35.14.7.3 Tx FIFO
Tx queue operation is configured by setting the TFQM bit in the TXBC register. Messages
stored in the Tx queue are transmitted starting with the message with the lowest message
ID (highest priority). In case multiple queue buffers are configured with the same message
ID, the queue buffer with the lowest buffer number is transmitted first.
35.14.7.4 Tx queue
Tx queue operation is configured by programming the TFQM bit field to a value of one.
Messages stored in the Tx queue are transmitted starting with the message with the
lowest message ID (highest priority). In case that multiple queue buffers are configured
with the same message ID, the queue buffer with the lowest buffer number is transmitted
first.
Is there an updated user manual or a better on line reference for the LP546XX CAN interface?
Thank you.
Jay S.
Hello Jay Schwichtenberg.
Thanks for your sharing, I have reported this to development team, they said will fix it next version.
BR
Alice