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i.MX6Quad AUDMUX Unused Timing Signal Lines

Question asked by Paul Katarzis on Feb 28, 2019
Latest reply on Mar 6, 2019 by igorpadykov

I am working with a system that uses an i.MX6Quad and two external audio codecs that need to act as I2S slaves. Both audio codecs share the same bit clock line and the same frame synchronization line. Each audio codec has its own TXD and RXD lines. The audio codecs do not support network mode and therefore must send and receive their data to separate SSI modules. The first audio codec data lines are connected to port 3 of AUDMUX and the second audio codec data lines are connected to port 4 of AUDMUX. The common bit clock line and frame synchronization lines are connected to port 3 of AUDMUX.

 

I would like SSI 1 to send and receive data from the audio codec on port 3 and would like SSI 2 to send and receive data from the audio codec on port 4. In this case, SSI 1 would be an I2S master and supply the bit clock and frame synchronization signals to both audio codecs over port 3. SSI 2 would then have to be an I2S slave and also receive the bit clock and frame synchronization signals from SSI 1 over port 1.

 

With this configuration, port 4 does not need to produce or consume any timing signals. Port 4 only needs to use its TXD and RXD lines. Is it possible to configure AUDMUX to do this? The only options I see for timing signal lines are to set them as either inputs or outputs. What if these lines act as neither inputs or outputs?

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