I want to have all power connections to the processor to be downstream of a single fused/regulated supply line. The only peripheral for which this seems to be a problem (based on the sabre board schematic) is the USB_OTG1_VBUS (I'll only be using one USB port to serve as a mass storage gadget). The datasheet for the processor says that the internal regulator "LDO_USB" creates 3.0V, presumably for peripheral logic and comm signal generation (though I thought USB signaling is 3.3V differential); however the datasheet also shows that USB_LDO input (using either USB_OTG1_VBUS or USB_OTG2_VBUS) has a supply input range of 4.4V minimum. Why is that?? This creates a problem for me because I don't want to use the 5V usb power in from the microB connector, and everything in my power "island" is 3.3V max. It would be way better for my design if I could simply tie USB_OTG1_VBUS to my 3.3V supply, along with my other peripheral supply power inputs (such as NVCC_SD, etc.). Why is USB_OTG1_VBUS at 4.4V minimum? Is this simply stating the USB standard, and therefore the actual LDO input can be lower? I realize I can cut and jump on the sabre board to the 3.3V supply to test it out, but I thought I would ask here first. I need USB power draw to be as low as possible, and I cannot support >4.4V at 50mA max draw, and I only have 3.3V max available on my design.